In the case of conventional memory devices, in particular conventional semiconductor memory devices, one differentiates between so-called functional memory devices (e.g. PLAs, PALs, etc.) and so-called table memory devices, e.g. ROM devices (ROM=Read Only Memory)—in particular PROMs, EPROMs, EEPROMs, flash memories, etc.—, and RAM devices (RAM=Random Access Memory or read-write memory), e.g. DRAMs and SRAMs.
A RAM device is a memory for storing data under a predetermined address and for reading out the data under this address later.
Since it is intended to accommodate as many memory cells as possible in a RAM device, one has been trying to realize same as simple as possible.
In the case of SRAMs (SRAM=Static Random Access Memory), the individual memory cells consist e.g. of few, for instance 6, transistors, and in the case of so-called DRAMs (DRAM=Dynamic Random Access Memory) in general only of one single, correspondingly controlled capacitive element (e.g. the gate-source capacitance of a MOSFET), with the capacitance of which one bit each can be stored as charge.
This charge, however, remains for a short time only. Therefore, a so-called “refresh” must be performed regularly, e.g. approximately every 64 ms.
In contrast to that, no “refresh” has to be performed in the case of SRAMS, i.e. the data stored in the memory cell remain stored as long as an appropriate supply voltage is fed to the SRAM.
In the case of non-volatile memory devices (NVMs), e.g. EPROMs, EEPROMs, and flash memories, the stored data remain, however, stored even when the supply voltage is switched off.
Furthermore, so-called “resistive” or “resistively switching” memory devices have also become known recently, e.g. so-called Perovskite Memories, Phase Change Memories, PMC memories (PMC=Programmable Metallization Cell), OUM memories (OUM=Ovonics (or Ovonyx, respectively) Unified Memories), hydrogenised, amorphous silicon memories (a-Si:H memories), polymer/organic memories, etc.
In the case of “resistive” or “resistively switching” memory devices, a material—which is, for instance, positioned between two appropriate electrodes (e.g. an anode and a cathode)—is placed, by appropriate switching processes, in a more or less conductive state (wherein e.g. the more conductive state corresponds to a stored, logic “One”, and the less conductive state corresponds to a stored, logic “Zero”, or vice versa).
In the case of PMC memories (PMC=Programmable Metallization Cell), for instance, when programming a corresponding PMC memory cell—depending on whether a logic “One” or a logic “Zero” is to be written into the cell—appropriate metal dendrites (e.g. Ag or Cu dendrites, etc.) are deposited between two electrodes by means of appropriate current pulses and by means of electrochemical reactions caused thereby (which results in a conductive state of the cell), or they are degraded (which results in a non-conductive state of the cell).
PMC memory cells are, for instance, known from Y. Hirose, H. Hirose, J. Appl. Phys. 47, 2767 (1975), and e.g. from M. N. Kozicki, M. Yun, L. Hilt, A. Singh, Electrochemical Society Proc., Vol. 99-13, (1999) 298, M. N. Kozicki, M. Yun, S. J. Yang, J. P. Aberouette, J. P. Bird, Superlattices and Microstructures, Vol. 27, No. 5/6 (2000) 485-488, and e.g. from M. N. Kozicki, M. Mitkova, J. Zhu, M. Park, C. Gopalan, “Can Solid State Electrochemistry Eliminate the Memory Scaling Quandry”, Proc. VLSI (2002), and R. Neale: “Micron to look again at non-volatile amorphous memory”, Electronic Engineering Design (2002).
In the case of Phase Change Memories, in a corresponding cell, a material positioned between two corresponding electrodes (i.e. an anode and a cathode) (e.g. an appropriate chalkogenide compound (e.g. a Ge—Sb—Te compound or an Ag—In—Sb—Te compound)) is placed in an amorphous, i.e. relatively weakly conductive, or a crystalline, i.e. relatively strongly conductive state by means of appropriate switching processes (wherein e.g. the relatively strongly conductive state may again correspond to a stored, logic “One”, and the relatively weakly conductive state may correspond to a stored, logic “Zero”, or vice versa).
Phase Change Memories are, for instance, known from G. Wicker, Nonvolatile, High Density, High Performance Phase Change Memory, SPIE Conference on Electronics and Structures for MEMS, Vol. 3891, Queensland, 2, 1999, and e.g. from Y. N. Hwang et al., Completely CMOS Compatible Phase Change Nonvolatile RAM Using NMOS Cell Transistors, IEEE Proceedings of the Nonvolatile Semiconductor Memory Workshop, Monterey, 91, 2003, etc.
In the case of the above-mentioned hydrogenised, amorphous silicon memories (a-Si:H memories), in a corresponding cell, a hydrogenised, amorphous silicon positioned between two corresponding electrodes (e.g. corresponding Cr—, V—, Ni—, Al—, Au—, Mg—, Fe—, Co—, Pd-electrodes) is—after an appropriate forming step—switched to a high-resistance or a low-resistance state by appropriate electric pulses (wherein, again, e.g. the low-resistance state may correspond to a stored, logic “One”, and the high-resistance state may correspond to a stored, logic “Zero”, or vice versa).
Hydrogenised, amorphous silicon memory cells are, for instance described in S. Gangophadhyay et al., Jpn. J. Appl. Phys. 24, 1363, 1985, and e.g. in A. E. Owen et al., Proceedings of the 5th International Conference on Solid State and Integrated Circuit Technology, 830, 1998, etc.
In the case of the above-mentioned Perovskite memory cells, a structure transition between a high-resistance state and a low-resistance state in a corresponding material (e.g. Perovskite oxides, oxidic insulating films with doped impurities, etc.) is achieved by means of charge carrier injection.
Perovskite memory cells are, for instance, known from S. Q. Liu et al., Appl. Phys. Lett. 76, 2749, 2000, and e.g. from W. W. Zhuang et al., IEDM 2002, etc.
Polymer/organic memory cells (e.g. charge-transfer-complex-based polymer/organic memory cells) are e.g. described in X. Wan et al., Phys. Stat. Sol. A 181, R13, 2000.
In the case of the above-mentioned “resistive” or “resistively switching” memory devices (Perovskite memories, Phase Change Memories, PMC memories, a-Si:H memories, polymer/organic memories, etc.), it is often tried to keep the layer thickness of the material positioned between the electrodes—which is correspondingly to be switched to a state of high or low conductivity—as small as possible.
This renders it possible to increase the field strengths achieved in the respective material, which may result in a correspondingly high switching rate.